/*!
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\file drv_usb_core.h
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\brief USB core low level driver header file
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\version 2020-08-01, V3.0.0, firmware for GD32F30x
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*/
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/*
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Copyright (c) 2020, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#ifndef __DRV_USB_CORE_H
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#define __DRV_USB_CORE_H
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#include "drv_usb_regs.h"
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#include "usb_ch9_std.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define USB_FS_EP0_MAX_LEN 64U /*!< maximum packet size of endpoint 0 */
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#define HC_MAX_PACKET_COUNT 140U /*!< maximum packet count */
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#define EP_ID(x) ((uint8_t)((x) & 0x7FU)) /*!< endpoint number */
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#define EP_DIR(x) ((uint8_t)((x) >> 7)) /*!< endpoint direction */
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enum _usb_mode {
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DEVICE_MODE = 0U, /*!< device mode */
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HOST_MODE, /*!< host mode */
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OTG_MODE /*!< OTG mode */
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};
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enum _usb_eptype {
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USB_EPTYPE_CTRL = 0U, /*!< control endpoint type */
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USB_EPTYPE_ISOC = 1U, /*!< isochronous endpoint type */
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USB_EPTYPE_BULK = 2U, /*!< bulk endpoint type */
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USB_EPTYPE_INTR = 3U, /*!< interrupt endpoint type */
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USB_EPTYPE_MASK = 3U /*!< endpoint type mask */
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};
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typedef enum
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{
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USB_OTG_OK = 0U, /*!< USB OTG status OK*/
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USB_OTG_FAIL /*!< USB OTG status fail*/
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} usb_otg_status;
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typedef enum
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{
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USB_OK = 0U, /*!< USB status OK*/
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USB_FAIL /*!< USB status fail*/
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} usb_status;
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typedef enum
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{
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USB_USE_FIFO, /*!< USB use FIFO transfer mode */
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USB_USE_DMA /*!< USB use DMA transfer mode */
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} usb_transfer_mode;
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typedef struct
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{
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uint8_t core_enum; /*!< USB core type */
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uint8_t core_speed; /*!< USB core speed */
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uint8_t num_pipe; /*!< USB host channel numbers */
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uint8_t num_ep; /*!< USB device endpoint numbers */
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uint8_t transfer_mode; /*!< USB transfer mode */
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uint8_t phy_itf; /*!< USB core PHY interface */
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uint8_t sof_enable; /*!< USB SOF output */
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uint8_t low_power; /*!< USB low power */
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uint8_t lpm_enable; /*!< USB link power mode(LPM) */
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uint8_t vbus_sensing_enable; /*!< USB VBUS sensing feature */
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uint8_t use_dedicated_ep1; /*!< USB dedicated endpoint1 interrupt */
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uint8_t use_external_vbus; /*!< enable or disable the use of the external VBUS */
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uint32_t base_reg; /*!< base register address */
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} usb_core_basic;
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/* static inline function definitions */
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/*!
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\brief get the global interrupts
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\param[in] usb_regs: pointer to USB core registers
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\param[out] none
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\retval interrupt status
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*/
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__STATIC_INLINE uint32_t usb_coreintr_get(usb_core_regs *usb_regs)
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{
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return usb_regs->gr->GINTEN & usb_regs->gr->GINTF;
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}
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/*!
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\brief set USB RX FIFO size
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\param[in] usb_regs: pointer to USB core registers
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\param[in] size: assigned FIFO size
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\param[out] none
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\retval none
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*/
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__STATIC_INLINE void usb_set_rxfifo(usb_core_regs *usb_regs, uint16_t size)
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{
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usb_regs->gr->GRFLEN = size;
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}
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/*!
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\brief enable the global interrupts
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\param[in] usb_regs: pointer to USB core registers
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\param[out] none
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\retval none
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*/
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__STATIC_INLINE void usb_globalint_enable(usb_core_regs *usb_regs)
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{
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/* enable USB global interrupt */
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usb_regs->gr->GAHBCS |= GAHBCS_GINTEN;
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}
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/*!
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\brief disable the global interrupts
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\param[in] usb_regs: pointer to USB core registers
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\param[out] none
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\retval none
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*/
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__STATIC_INLINE void usb_globalint_disable(usb_core_regs *usb_regs)
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{
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/* disable USB global interrupt */
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usb_regs->gr->GAHBCS &= ~GAHBCS_GINTEN;
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}
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/* function declarations */
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/* configure core capabilities */
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usb_status usb_basic_init (usb_core_basic *usb_basic, usb_core_regs *usb_regs, usb_core_enum usb_core);
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/* initializes the USB controller registers and prepares the core device mode or host mode operation */
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usb_status usb_core_init (usb_core_basic usb_basic, usb_core_regs *usb_regs);
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/* write a packet into the Tx FIFO associated with the endpoint */
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usb_status usb_txfifo_write (usb_core_regs *usb_regs, uint8_t *src_buf, uint8_t fifo_num, uint16_t byte_count);
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/* read a packet from the Rx FIFO associated with the endpoint */
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void *usb_rxfifo_read (usb_core_regs *usb_regs, uint8_t *dest_buf, uint16_t byte_count);
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/* flush a Tx FIFO or all Tx FIFOs */
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usb_status usb_txfifo_flush (usb_core_regs *usb_regs, uint8_t fifo_num);
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/* flush the entire Rx FIFO */
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usb_status usb_rxfifo_flush (usb_core_regs *usb_regs);
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/* set endpoint or channel TX FIFO size */
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void usb_set_txfifo(usb_core_regs *usb_regs, uint8_t fifo, uint16_t size);
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/* set USB current mode */
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void usb_curmode_set(usb_core_regs *usb_regs, uint8_t mode);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DRV_USB_CORE_H */
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